The present invention relates to methods for manufacturing a silicon carbide semiconductor device, and particularly to a manufacturing method of implanting impurity ions into a silicon carbide semiconductor layer to self-alignedly form an ohmic electrode on the implanted region.
Silicon carbide (hereinafter, also referred to as SiC) which is one of the semiconductors having a wide band gap, has the band gap of 3.26 eV (in the case of 4H—SiC), which is larger than that of silicon (Si) by about three times. Additionally, SiC has a breakdown field, larger than that of Si by about ten times, an electron saturation velocity of 2×107 cm/s, larger than that of Si by about two times, and a thermal conductivity of 4.9 W/cm.K, larger than that of Si by about three times. Therefore, semiconductor devices employing SiC are expected to achieve high breakdown voltage, low loss, high output, and high efficiency, and thus have been on a focus of attention in recent years.
When forming a semiconductor device composed of SiC, an epitaxial layer is typically used. This is because a method of diffusing impurities from a gas phase, typically used in a manufacturing step of a Si semiconductor device, cannot be employed since an impurity diffusion coefficient of SiC is small. Meanwhile, for ion implantation methods, researches on impurities to be added and heat treatment temperatures have not yet progressed sufficiently.
As an example of conventional SiC semiconductor devices, a manufacturing method of a field effect transistor using an epitaxial layer will be explained. Referring to FIGS. 5a to 5d, first, a semiconductor substrate is prepared by epitaxially growing an n-type channel layer 2 and an n-type heavily doped layer 3 doped with a high-concentration impurity on a silicon carbide semi-insulating substrate 1 sequentially (FIG. 5a). In order to ensure an electrical isolation between neighboring field effect transistors, the n-type heavily doped layer 3 and the n-type channel layer 2 except for those in a region in which a field effect transistor is to be formed are removed by dry etching, to thereby expose the substrate 1 (FIG. 5b). The n-type heavily doped layer 3 except for that in regions on which source and drain electrodes are to be formed is then removed by dry etching (FIG. 5c). A metal film that forms an ohmic contact is formed on the regions on which source and drain electrodes are to be formed while using typical photolithography, heat treatment will be performed if necessary, and a source electrode 4 and a drain electrode 5 are formed. Finally, a gate electrode 6 that forms a schottky contact with the n-type channel layer 2 is formed, completing a silicon carbide field effect transistor (FIG. 5d).
Further, a method of forming the n-type heavily doped layer 3 by means of implanting impurity ions into the layer, instead of epitaxially growing the layer is disclosed (see, Japanese Unexamined Patent Publication No. 175239/1993). When implanting impurity ions into a silicon carbide semiconductor to form a heavily doped region, high temperature heat treatment referred to as activation anneal is needed to activate the implanted impurity ions. When activating, for example nitrogen ions implanted into SiC, heat treatment at 1200° C. is required (Japanese Unexamined Patent Publication No. 164525/2000).